1. Field of the Invention
The present invention relates to a digital data processing circuit having a bit reverse function, and more particularly to a digital data processing circuit suitable for a digital signal processor having a fast Fourier transform (FFT) function.
2. Description of the Background Art
When a discrete Fourier transform (DFT) is performed by a digital signal processor, an FFT algorithm is usually employed. In order to perform an FFT, the order of a bit string of data to be processed has to be reversed. The data to be processed is usually stored in a memory. To reverse the order of the bit string, the data is read out of the memory and is processed by a software program, or by a hardware circuit. It is important to reverse the order of the bit string at high speed in order to enhance the performance of the digital signal processor.
Various techniques have been proposed for effecting bit reversal. For example, it has been known to use a table memory for preliminarily storing data having a reversed bit string. The stored data having the reversed bit string are read out of the table memory as needed. This technique, however, requires a large amount of memory and is unsuitable for a small size signal processor chip. Therefore, a hardware circuit to reverse the bit string has been employed effectively in the signal processor chip.
Another proposed bit reversal technique employs a plurality of switching gates inserted between a bus and a register. A bit string of data in the register is reversed and derived from the register via the switching gates. Thus, the bit reverse operation can be performed at a high speed without a large amount of memory. However, such a bit reverse circuit cannot reverse a part of the bit string selectively. In other words, only a full bit string or a fixed bit string may be reversed. Therefore, when it is necessary to perform a bit reverse operation for a part of data or for arbitrary bits of data within a bit string, this bit reverse circuit is insufficient.